Japanese Patent Application Publication No. 2015-118991 discloses a semiconductor device that includes an IGBT and a diode. In this semiconductor device, a plurality of trenches is provided in a front surface of the semiconductor substrate. Gate electrodes isolated from the semiconductor substrate are provided in the trenches in an IGBT area. Dummy electrodes isolated from the semiconductor substrate are provided in the trenches in a diode area. The semiconductor substrate includes a plurality of inter-trench semiconductor regions, each of which is intervened between two trenches. An n-type emitter region and a p-type body region are provided in the inter-trench semiconductor regions of the IGBT area. A p-type anode region is provided in the inter-trench semiconductor regions of the diode area. Further, an n-type drift region is arranged under the body region and the anode region. A p-type collector region and an n-type cathode region are provided under the drift region. The collector region is provided in the IGBT area. The cathode region is provided in the diode area. An IGBT is configured in the IGBT area by the emitter region, the body region, the drift region, the collector region, the gate electrodes, and the like. A diode is configured in the diode area by the anode region, the drift region, the cathode region, and the like. Further, in this semiconductor device, a lifetime control region (crystal defect region) is provided in the drift region. The lifetime control region is a region having a higher crystal defect density than its surrounding drift region. The lifetime control region is provided within the diode area, as well as within the IGBT area at a position in proximity to the diode area. That is, the lifetime control region is provided so that it protrudes from the diode area into the IGBT area. Further, the lifetime control region is disposed above an intermediate depth of the drift region (center position of the drift region in a thickness direction of the semiconductor substrate). When the lifetime control region is provided in the drift region above the intermediate depth in the diode area, carriers in the drift region upon a reverse recovery operation of the diode are efficiently recombined within the lifetime control region. Due to this, a reverse recovery loss of the diode is suppressed. Further, at a border between the IGBT area and the diode area, a parasitic diode is created on a passage extending from the body region in the IGBT area to the cathode region through the drift region. This parasitic diode at the border operates when the diode in the diode area operates. In this semiconductor device, the reverse recovery loss is suppressed by the lifetime control region protruding within the IGBT area from the diode area upon a reverse recovery operation of the parasitic diode at the border. Accordingly, in this semiconductor device, the reverse recovery loss is suppressed not only in the diode of the diode area but in the parasitic diode at the border as well.